In the Press

Please feel free to download copies of these articles which have appeared in the trade press regarding our WaveEtch and Aeris Precision technologies. Please do not hesitate to contact us if we can be of any assistance in providing you with a solution to your etching or chemical delivery and metering problems.

 

 

SPN VIEWPOINT 2016: Ricardo Fuentes, CEO/President, MATECH SPN VIEWPOINT 2016: Ricardo Fuentes, CEO/President, MATECH

Semiconductor Packaging News. VIEWPOINT 2016: Ricardo Fuentes, CEO/President, MATECH. Feb. 9, 2016. OK, since everybody seems to be piling it on Apple lately, I do not feel too bad to add to the fray. But, in a more serious vein, what's going on with Apple is one of those lessons that we all hear about, but of which we always seem to have a more historical perspective. It is interesting to see it happen in real time--for as long as it is not happening to us. The lesson that I am talking about is about innovation. Read more...

Extending Process Flexibility for Single-wafer Wet Etch
Despite the success of some dry-etching processes, wet etching remains a staple in semiconductor device fabrication, as well as in many other related technologies, such as MEMS and photovoltaics manufacturing. Wet etch processes are common both in device formation as well as in the metallization and packaging areas of the semiconductor process line...
Extending process flexibility for single[...]
Adobe Acrobat document [453.1 KB]
Single Sided Wafer Thinning for 3D Integration
High uniformity, single-sided wafer thinning is an enabling step for 3D wafer-level integration and for next generation 3D packaging solutions. This paper presents field results from a new wet etch thinning technology that allows for the thinning of wafers down to 50 um or less, with better uniformity, and at a lower cost than conventional thinning--without the need to protect the non-process side...
Single Sided Wafer Thinning for 3D integ[...]
Adobe Acrobat document [747.4 KB]
Wafer Thinning for 3D Integration
We are fast approaching the limits of what can be achieved by shrinking IC groundrules. Moore’s Law, which states that the number of transistors on an integrated circuit doubles approximately every two years, is no longer true. Transistor counts are expected to increase at a slower pace for the next few years, doubling only every three years or so. In light of this decreasing trend, the increase in functionality can be expected to come from a combination of transistor count and packing density—3D chip stacking or 3D packaging...
Wafer Thinning for 3D Integration-PAPER [...]
Adobe Acrobat document [723.5 KB]
Single Sided Wet Etching for Texturing, Thinning, and Packaging Applications
The advancement of wafer thinning and surface treatment technologies has been somewhat limited by the methods commonly employed; namely immersion, spin, or spray etching. All these technologies suffer from inherent transport characteristics that result in non-uniformity, limitations in the minimum thickness attainable, and lack of process flexibility...
Single Sided Wet Etching for Texturing, [...]
Adobe Acrobat document [893.0 KB]
Single Sided Wafer Thinning and Handling
The increasing demand for smaller, more portable, more powerful electronics has driven an increase in the functionality of the devices that power them—more capabilities and features have to be packed in smaller spaces. Given the approaching limits of Moore’s law, an alternative to shrinking feature sizes is to increase the density and functionality of the integrated circuit (IC) packages...
Single Sided Wafer Thinning and Handling[...]
Adobe Acrobat document [470.5 KB]

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WaveEtch: The Greenest Wet Etcher WaveEtch: The Greenest Wet Etcher